This website hosts the TEM VHDL library.
The TEM library is a collection of VHDL design files suitable for FPGA implementations.
The main part is a 32bits RISC CPU with memory management, cache controller and floating point units. This CPU is based on the SPARC version 8 standard.
The CPU can be used for embedded design, it can also be connected to special peripherals to build a “computer a FPGA” which can run (unmodified) software and operating systems developed for “SparcStations” workstations.
This journal will trace the evolution of the project, explain how to use the cores and provide some insights on CPU architecture and logic design.
The first release is far from complete; many cool enhancements are not yet published and more will be developed.