TEMLIB

The TEM library

TEMLIB

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IU : Integer multiplication and division

Posted on 2014/04/18 by dev
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First, there are two kinds of multipliers and dividers in our CPU, the integer and the floating point ones. They are a bit different.

Posted in ARCH, BASICS | Leave a reply

Keyboard and Mouse

Posted on 2014/04/08 by dev
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To complete our workstation, after the video output, we need a keyboard and, eventually, a mouse.

Posted in PROJECT | Leave a reply

TCX

Posted on 2014/03/28 by dev
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TEMLIB v3 now includes a video controller suitable for the Sun4m workstation.

Posted in PROJECT | Leave a reply

TEMLIB r3

Posted on 2014/03/22 by dev
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Adding Keyboard, Mouse, Video !

Posted in PROJECT, UPDATE | Leave a reply

IU : Condition codes

Posted on 2013/12/22 by dev
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SPARC CPUs use condition codes, the famous NZVC bits (Negative, Zero, ‘Verflow and Carry).

Posted in ARCH | Leave a reply

FIFOs, buffers, and pipelines

Posted on 2013/11/27 by dev
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Things you ought to know!

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IU : Pipelined : Multicycle

Posted on 2013/11/21 by dev
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Some instructions last more than one cycle, even on RISC CPUs.  

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IU : Pipelined : Stall and Bypass

Posted on 2013/10/31 by dev
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Integer registers are read at the beginning of the EXECUTE stage and are updated at the end of the WRITE stage.

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IU : Pipelined : Traps

Posted on 2013/10/26 by dev
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There are many circumstances where a CPU may halt and jump to an exception vector:

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IU : Pipelined : PIPE5 presentation

Posted on 2013/10/15 by dev
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This is the traditional RISC implementation, the one you find in hundreds of CPU cores, thousands of books, millions of computer architecture courses, gazillions chips.

Posted in ARCH | Leave a reply

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